CMPE 212

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Materials to Review for Quiz 1:

Materials included here do not belong to me, any request to take down and I will do so

Class: 1, slide: 11 → General Computer Organization
1_11
Class: 1, slide: 15 → System Bus Model
1_15
Class: 1, slide: 17 → An Example Motherboard
1_17
Class: 1, slide: 19 → Execution Cycle - Von Neuman Model
1_19
Class: 1, slide: 21 → Levels of Abstraction
1_21
Class: 2, slide: 3,5 → Converting Base 2 to Base 10
2_3 2_4 2_5
Class: 2, slide: 7-10 → Add, Sub, Mult & Divide Base 2
2_7 2_8 2_9 2_10
Class: 2, slide: 12-15 → Converting Base 10 to Base 2
2_12 2_13 2_14 2_15
Class: 2, slide: 17&18 → Converting hex to/from bin
2_3
Class: 3, slide: 4-6 → Convert Dec to/from Two's Compliment
3_4 3_5 3_6
Class: 3, slide: 15 → Map from dec to other signed representations
3_15
Class: 3, slide: 27 → Arithmetic Overflow
3_27
Class: 4, slide: 5-6 → Basic Boolean Postulates
4_5 4_6
Class: 4, slide: 13-16 → More Boolean Theorms, Invariance, Null Elements, DeMorgan's
4_13 4_14 4_15 4_16
Class: 4, slide: 20 → Logic Gates and their Symbols
4_20

Materials to Review for Quiz 2:

Class: 5, slide: 19 → Floating Point with example (ref slide 18)
5_18 5_19
Class: 5, slide: 22-23 → Ascii - know how to convert letters and Numbers
5_22 5_23
Class: 5, slide: 24-25 → Grey Code
5_24 5_25
Class: 5, slide: 27 → Fundamental SECDED definitions
5_27
Class: 6, slide: 14,17-20 → Draw and explain operation of Gates
6_14 6_15 6_16 6_17 6_18 6_19 6_20
Class: 7, slide: 10 → NAND, NOR, XOR, XNOR Truth Tables
7_10
Class: 7, slide: 11 → Variants of Logic Symbols
7_11
Class: 7, slide: 12 → Demorgan's Make an OR from an NAND gate
7_12
Class: 7, slide: 13 → Build a gate using just NANDs
7_13
Class: 7, slide: 18-20 → Canonical SOP or POS from Truth Tables
7_18 7_19 7_20
Class: 7, slide: 22-24 → OR-AND, AND-OR Implementation(s)
7_22 7_23 7_24
Class: 8, slide: 11-14 → Simplify a circuit w/ Boolean Algebra
8_11 8_12 8_13 8_14
Class: 8, slide: 15 → Construct a circuit from a Truth Table
8_15

Additional Materials to Review for The Midterm:

Class: 9, slide: 8 → Propagation Delay
9_8
Class: 9, slide: 9 → Speed-Power trade-off
9_9
Class: 9, slide: 10 → Timing Diagram with Delay
9_10
Class: 9, slide: 13-14 → Bubles Matching & Gate Conversion
9_13 9_14
Class: 9, slide: 18-20 → Converting Popular Cells to 2 Input Nands
9_18 9_19 9_20
Class: 9, slide: 21 → Technology Mapping - XOR
9_21
Class: 10, slide: 5 → Forming Karnaugh Maps
10_5
Class: 10, slide: 8-16 → Know How to do a Karnaugh-Map!!
10_6 10_7 10_8 10_9 10_10 10_11 10_12 10_13